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W536030P/060P/090P/120P VOICE & MELODY CONTROLLER (ViewTalk TM Series)
Table of Contents1. 2. 3. 4. 5. GENERAL DESCRIPTION ......................................................................................................... 2 FEATURES ................................................................................................................................. 3 BLOCK DIAGRAM ...................................................................................................................... 5 PAD DESCRIPTION ................................................................................................................... 6 ELECTRICAL CHARACTERISTICS........................................................................................... 7 5.1 5.2 5.3 6. Absolute Maximum Ratings............................................................................................... 7 DC Characteristics............................................................................................................. 8 AC Characteristics ............................................................................................................. 9
TYPICAL APPLICATION CIRCUITS ........................................................................................ 12 6.1 6.2 Sub Clock with RC Mode................................................................................................. 12 Sub Clock with Xtal Mode................................................................................................ 13
7.
REVISION HISTORY ................................................................................................................ 14
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
1. GENERAL DESCRIPTION
The W536XXXP, a member of ViewTalkTM family, is a high-performance 4-bit micro-controller (uC) with built-in 8KW uC program. The 4-bit uC core contains dual clock source, 4-bit ALU, two 8-bit timers, one 14 bits divider, maximum 32 pads for input or output, 8 interrupt sources and 8-level nesting for subroutine/interrupt applications. Speech unit, integrated as a single chip with maximum 128 seconds (based on 6.4K sample rate with 5 bits MDPCM), is capable of expanding to 512 seconds speech addressed by external memory W55XXX with serial bus interface. It can be implemented with Winbond Power Speech using MDPCM algorithm. Melody unit provides dual tone output and can store up to 1k notes. Power reduction mode is also built in to minimize power dissipation. It is ideal for educational toys, remote controllers and other application products which incorporate both melody and speech.
BODY
W536030P
W536060P
W536090P
W536120P
Voice I/O pad WDT disable/Enable (Mask Option) Sub-clock RC/XTAL mode (Mask Option) Tri-state serial bus (Mask Option)( 1) Cascaded Voice through serial bus (2)
Notes:
30 sec 8I/O, 8I
(RA/RB/RC/RD)
60 sec 8I/O, 8I
(RA/RB/RC/RD)
90 sec 8I/O, 12I, 12O
(RA/RB/RC/RD/RE /RF/RG/RH)
120 sec 8I/O, 12I, 12O
(RA/RB/RC/RD/RE/ RF/RG/RH)
Y
Y
Y
Y
Y
Y
Y
Y
Y Y
Y Y
Y N
Y Y
1. Tri-state serial bus mask option can float serial bus while voice playing is no active. Let this mask option is disabled to get minimum power consumption in general. 2. Cascaded Voice ROM user option help to expand voice up to 512 sec through serial bus by W55XXX chip.
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W536030P/060P/090P/120P
2. FEATURES
* Operating voltage: 2.4 volt ~ 5.5 volt * Watch dog disabled/enabled by mask option * Dual clock operating system - Main clock with Ring/Crystal (400 KHz to 4 MHz) - Sub-clock with 32.768 KHz RC/Crystal by mask option * Memory - Program ROM (P-ROM): 8 K x 20 (ROM Bank0) - Data RAM (W-RAM): 1K x 4 bit (RAM Bank 0 is 512 nibbles from 0: 000~0: 1FF and 0:380~0:3FF are mapped to special register. RAM Bank F is 512 nibbles from F: 200~F: 3FF either data RAM or dedicated to script kernel) * Maximum 32 input/output pads - Ports for input only: 12 pads (RC, RD and RG port; RG for W536090P/120P only) - Ports for output only: 12 pads (RE, RF and RH port; RH for W536090P/120P only) - Ports for Input/output: 8 pads * Power-down mode - Hold mode (except for 32KHz oscillator) - Stop mode (including 32KHz oscillator and release by RD or RC port) * Eight types of interrupts - Five internal interrupts (Divider, Timer 0, Timer 1, Speech, Melody) - Three external interrupts (Port RC, RD, RA) * One built-in 14-bit clock frequency divider circuit * Two built-in 8-bit programmable countdown timers - Timer 0: one of two clock sources (FOSC/4 or FOSC/1024) can be selected - Timer 1: built-in auto-reload function includes internal timer, external event counter from RC.0 * Built-in 18/14-bit watchdog timer for system reset. * Powerful instruction sets. * 8-level subroutine (including interrupt) nesting
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
* Speech function - Provided 1M / 2M/ 3M/ 4M bits Voice ROM for W536030P/060P/090P/120P based on 5 bits MDPCM algorithm - Voice ROM (V-ROM) available for uC data. - Maximum 8*256 Label/Interrupt vector (voice section number) available - Provide two types of speech busy flag to either each GO or each trigger - Maximum up to 16M bits speech address capability interface with external memory W55XXX through serial bus. * Melody function - Provide 1K notes (22bits/note) dedicated melody ROM - Provide two types of melody busy flag to uC either each note or each song - Provide 6 kinds of beat, 16 kinds of tempo, and pitch range from G3# to C7 - Tremolo, triple frequency and 3 kinds of percussion available - Maximum 31 songs available * Can mix speech with melody * Multi-engine controller * Direct driving speaker/buzzer or DAC output * Chip On Board available
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W536030P/060P/090P/120P
3. BLOCK DIAGRAM
Data R AM 1K* 4Bit
PORT RA
TO NE
RA0~3
PORT RB
PORT RC
RB0~3
R C 0~3
ACC
ROM 8K*20Bit
PORT RD
ALU
PO PO R T R E
PORT RF
R D 0~3
RE0~3
R F0~3
PC
Special Register
IE F HCF HEF
SP C
PO R T R G
PO R T R H
Parallel to Serial
R G 0~3
R H 0~3 AD D R CLK
D ATA VD D A
P EF
M LD
EV F FLAG 0 PS R0 LP X 3
LP Y 1
S TAC K (8 Levels)
FLAG 1
LPX 0
LPX 4
MR PM 0 0 LPX 1 LP X 2
LPX 5 LP Y 0
SP C_busy S PC _play
LP XY
S hared_RO M Data
Speech M DPC M core
R O SC
VSSA
VSSP
Tim er 0 (8 Bit)
Tim er 1 (8 Bit)
Interrupt ,H old & Stop C ontrol
M LD _busy M LD_play
V oice RO M (1M /2M /3M /4M bits)
PW M 1/D AC
PW M /D AC M ix Block
PW M 2 VD DP VD D
VSS
W atch Dog Tim er (18/14 Bit)
D ivide r (14/10 Bit)
Tim ing G enerator
Dual Tone M elody (1K notes)
TES T
R ES
XIN
XO U T
X32I X32O
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
4. PAD DESCRIPTION
SYMBOL I/O FUNCTION
XIN/RXIN
I
Input pad for main clock oscillator. It can be connected to crystal when crystal mode is selected (SCR0.2=1), otherwise connect a resistor to VDD to generate main system clock while Ring mode is selected (SCR0.2=0 and default). Oscillator can be enabled or stopped by set SCR0.1 to 1 or clear to 0 separately. External capacitor connects to start oscillation and get more accurate clock when crystal mode Output pad for oscillator which is connected to another crystal pad when in crystal mode. External capacitor connects to start oscillation when in crystal mode. 32.768 KHz crystal input pad or external resistor node 1 by mask option. External 15~20pF capacitor connects to start oscillation and get more accurate clock when in crystal mode. 32.768 KHz crystal output pad or external resistor node 2 by mask option. External 15~20pF capacitor connects to start oscillation when in crystal mode. General Input/Output port specified by PM1 register. If output mode is selected, PM0 register bit 0 can be used to specify CMOS/NMOS driving capability option. Initial state is input mode. RA3 may be uses as TONE if bit 0 of MR0 special register is set to logic 1. An interrupt source. General Input/Output port specified by PM2 register. If output mode is selected, PM0 register bit 1 can be used to specify CMOS/NMOS driving capability option. Initial state is input mode. 4-bit schmitter input with internal pull high option specified by PM3 register bit 2. Each pad has an independent interrupt capability specified by PEFL special register. Interrupt and STOP mode wake up source. RC0 is also the external event counter source of Timer1. 4-bit schmitter input port with internal pull high option specified by PM3 register bit 3. Each pad has an independent interrupt capability specified by PEFH special register. Interrupt and STOP mode wake up source. Output port only. PM3 register bit 0 can be used to specify CMOS/NMOS driving capability option. Output port only. PM3 register bit 1 can be used to specify CMOS/NMOS driving capability option. Input port with internal pull high option specified by PM6 register bit 0. (W536090P/W536120P only) Output port only. PM6 register bit 1 can be used to specify CMOS/NMOS driving capability option. (W536090P/W536120P only) System reset pad, active low with internal pull-high resistor.
XOUT
O
X32I/RSUB1
I
X32O/RSUB2
O
RA0 ~ RA3/TONE (4) RB0 ~ RB3 (4) RC0 ~ RC3
I/O
I/O
I
RD0 ~ RD3 RE0~RE3 (4) RF0~RF3 (4) RG0 ~ RG3 RH0 ~ RH3 (4)
RES
I
O O I O I
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W536030P/060P/090P/120P
PAD Description, continued
SYMBOL
I/O
FUNCTION
TEST ROSC PWM1/DAC PWM2 ADDR CLK DATA VSS VSSP VSSA (3) VDD VDDP VDDA (3)
Notes:
I I O O O O I/O I I I I I I
Test pad. Active high with internal pull low resistor. Connect resistor to VDD pad to generate speech or melody playing clock source. While speech or melody is active, PWM1/DAC is speaker direct driving output or DAC output controlled by voice output file. While speech or melody is active, PWM2 is another speaker direct driving output. External serial memory address write clock for voice extension. External serial memory address read clock for voice extension. External serial memory data in/out for voice extension. Chip ground. Chip ground for PWM or DAC playing output. Chip ground. (W536090P/120P only) Power source. Power source for PWM or DAC playing output. Power source. (W536090P/120P only)
(3). VDDA, VSSA for W536090P/120P only. To sure chip operation properly, please bond all VDD, VDDA, VDDP, VSS, VSSA and VSSP pads, and connect VSS, VSSP form chip external PCB circuit. (4). When working at NMOS open drain mode, external pull high voltage can't higher than VDD to avoid leakage current.
5. ELECTRICAL CHARACTERISTICS
5.1 Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to Ground Potential Applied Input/Output Voltage Power Dissipation Ambient Operating Temperature Storage Temperature
-0.3 to +7.0 -0.3 to +7.0 120 0 to +70 -55 to +150
V V mW C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
5.2 DC Characteristics
(VDD-VSS = 3.0V, No load, FM = 4 MHz with Ring mode, Fs = 32.768 KHz, with Xtal mode, TA = 25 C unless otherwise specified)
PARAMETER Op. Voltage Op. Current (No Load, no Voice, no Melody) Hold Mode Current Stop Mode Current CLK/ADDR Output High Current CLK/ADDR Output low Current Input Low Voltage Input High Voltage Port RA, RB, RE, RF and RH Output Low Voltage Port RA, RB, RE, RF and RH Output High Voltage Pull-up Resistor RES Pull-up Resistor PWM1/2 Source Current (4) (RLOAD = 8 between PWM1 And PWM2) PWM1/2 Sink Current (4) (RLOAD = 8 between PWM1 And PWM2) DAC output Current
Notes: (4). PWM current deviation will be 20%.
SYM. VDD IOP1
CONDITIONS Dual clock with crystal Dual clock with Ring type Sub-clock only
MIN 2.4 -
TYP 400 400 15 4
MAX 5.5 500 500 30 6 1
UNIT V A
IOP2 IOP3 IoH1 IoL1 VIL VIH VABL VABH RCD RRES ISPH
Sub-clock active only
A A mA mA VDD VDD V V K K mA
Vout = 2.7V Vout = 0.4V IOL = 2.0 mA IOH = -2.0 mA Port RC, RD, RG Volume Option = 00 Volume Option = 01 Volume Option = 10 Volume Option = 11 VSS 0.7 2.4 200 50 300 100 -20 -70 -110 -135 20 70 110 135 -4 -5
-0.8 0.8 0.3 1 0.4 400 200
ISPL
Volume Option = 00 Volume Option = 01 Volume Option = 10 Volume Option = 11
mA
IDAC
VDD = 3V, RL = 100ohm
-6
mA
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W536030P/060P/090P/120P
5.3 AC Characteristics
(VDD-VSS = 3.0V, No load, FM = 4 MHz with Ring mode, Fs = 32.768 KHz, with Xtal mode, TA = 25 C unless otherwise specified)
PARAMETER Sub-clock Frequency Main-clock Frequency Chip Operation Frequency
SYM. FSUB FM FOSC
CONDITIONS Crystal type and X32IN and X32O with 17pF external cap. Ring type/Crystal type SCR0.0 = 1, FSYS = FSUB SCR0.0 = 0; FSYS = FMAIN
MIN.
TYP. 32768
MAX.
UNIT Hz
400K
32768
4M
Hz Hz
400K 1 1
4/FOSC 1M 2M 3M 4M 32
4M S S S Hz
Instruction Cycle Time Reset Active Width Interrupt Active Width Main clock Ring frequency
TCYC TRAW TIAW FRXIN
One machine cycle FOSC = 32.768 KHz FOSC = 32.768 KHz RXIN = 680K RXIN = 330K RXIN = 200K RXIN = 130K
Sub-Clock RC Oscillator Sub-Clock Oscillation Stable Time @ Cold Start Frequency Deviation of main-clock FRXIN 2 MHz Frequency Deviation of main-clock FRXIN = 3 MHz Frequency Deviation of main-clock FRXIN = 4 MHz ROSC Frequency Frequency Deviation of FROSC = 3MHz
Notes:
FRSUB FSTOP f f f f f f FROS
C
RSUB = 680K RSUB = 680K
f(3V) - f(2.4V) f(3V) f(3V) - f(2.4V) f(3V) f(3V) - f(2.4V) f(3V)
KHz 1 10 S %
0.8
15
%
20 3 7.5
% MHz %
ROSC = 680K
f(3V) - f(2.4V) f(3V)
f f
(5). The deviation will be +20% while VDD drops from 5.5V to 2.4V based on same resistor
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
Iop Vs. Main clock RC mode
800 600 400 Iop (uA) 200 0
3V 4.5V 1 2 3 4
Freq (MhZ)
Oscillation Freq Vs. Sub-Clock
44 40 36
Fsub (KhZ) 32
3V 4.5V
28 24 20 560 620 680 750 820 1K Rsub (Kohm)
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W536030P/060P/090P/120P
Main Freq Vs. Rxin
6 5 4
Fmain 3 (MhZ)
2 1 0 130 150 160 200 330 680 2K 3K
2.4V 3v 4.5V 5.5V
RXIN (Kohm)
Voice Operating Freq. Vs. ROSC
Freq (MhZ)
4.5 4 3.5 3 2.5 2 470 560 680 910
ROSC (Kohm)
3V 4.5V
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
6. TYPICAL APPLICATION CIRCUITS
6.1 Sub Clock with RC Mode
VDDP
VDDP
R5
(*1)
SWITCH
C4
___ RES VDDP VDDA
470
SPEAKER Q1
8050
(*3)
C1
R4
VDD Rosc
W536XXXP
PWM1/DAC
C6
C2 C3
Battery
R1
SPEAKER
VDDP
XIN
R3
(*2)
PWM2 ADDR CLK
(*2) C5
W55MXX
X32IN DATA
R2
X32IO
VSSP
VSS
VSSA
(*4)
COMPONENT Value Notes:
C1 4.7uF
C2~C4 0.1uF
C5~C6 100pF
C7~C8 -
R1 680K
R2 680K
R3 650K/1MHz 350K/2MHz 225K/3MHz 160K/4MHz
R4 100
1. Option R5 equals to 100 if high noise immunity is needed. 2. For DAC option application. 3. To ensure that three batteries function well in W536F20 demo board. C6 should stay close to pad PWM/PWM2 at its best. Under the mask ROM version, C5 and C6 can be skipped. 4. Sure chip operation properly, please bond all VDDP, VDDA, VDD, VSSP, VSSA and VSS; and connect VSSP pad to VSS from external PCB circuit. VDDA, VSSA are only for W536090P/120P.
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W536030P/060P/090P/120P
6.2 Sub Clock with Xtal Mode
VDDP
(*1)
SWITCH
R5
VDDP
C4
___ RES VDDP VDDA
SPEAKER Q1 8050
C1
R4
VDD Rosc
W536XXXP
PWM1/DAC
470
(*3)
C2
Battery
C3
R1
XIN
R3
(*2)
C6 PWM2
ADDR CLK DATA
SPEAKER
C5
VDDP
(*2)
X32IN
W55MXX
C7
32K
X32IO
C8
VSSP VSSA VSS
(*4)
COMPONENT Value
C1 4.7uF
C2~C4 0.1uF
C5~C6 100pF
C7~C8 15~30PF
R1 680K
R2 -
R3 650K/1MHz 350K/2MHz 225K/3MHz 160K/4M/Hz
R4 100
Notes: 1. Option R5 equals to 100 if high noise immunity is needed. 2. For DAC option application. 3. To ensure that three batteries function well in W536F20 demo board. C6 should stay close to pad PWM/PWM2 at its best. Under the mask ROM version, C5 and C6 can be skipped. 4. Sure chip operation properly, please bond all VDDP, VDDA, VDD, VSSP, VSSA and VSS; and connect VSSP pad to VSS from external PCB circuit. VDDA, VSSA are only for W536090P/120P.
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Publication Release Date: May 21, 2003 Revision A4
W536030P/060P/090P/120P
7. REVISION HISTORY
VERSION DATE WRITER DESCRIPTION
A1 A2 A3 A4
April 19, 2000 Aug. 7, 2000 Jun. 1, 2001 May 21, 2003
Judy Kuo Jimmy Chen Jimmy Chen Jimmy Chen
(10) W536060A to 12io only, and external speech shared RD port except W536120X Part No * Speech Function Modify * Speech Function Modify * Modify some errors and add "Tri-state serial bus" mask option and cascaded voice ROM function
Headquarters
No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5665577 http://www.winbond.com.tw/
Winbond Electronics Corporation America
2727 North First Street, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-5441798
Winbond Electronics (Shanghai) Ltd.
27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998
Taipei Office
9F, No.480, Rueiguang Rd., Neihu District, Taipei, 114, Taiwan, R.O.C. TEL: 886-2-8177-7168 FAX: 886-2-8751-3579
Winbond Electronics Corporation Japan
7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded updates. No representation or warranty is given and no liability is assumed by Winbond Electronics Corp. with respect to the accuracy or use of such information, or infringement of patents or other intellectual property. - 14 -

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